ARM PATCH fix reload of half-word reads when there are alignment traps

[Richard Earnshaw <rearnsha at buzzard dot freeserve dot co dot uk>]

When there are alignment traps on the ARM and we have no halfword memory 
instructions (eg pre armv4), then we use a scratch to load one byte of the 
result, and load the other byte into the target register.  Unfortunately 
reload does not guarantee that the scratch won't overlap the destination 
register (which is why we ask for a DImode scratch).  Sadly we still 
failed to check for this overlap inside arm_reload_in_hi, so we ended up 
trying to load both bytes into the same register.  Fixed by checking for 
the overlap and using "the other half" of the scratch in this case.

Fixed with the patch below and bootstrapped/regtested on arm-netbsdelf 
(which uses this feature).

R.

2003-02-16 Richard Earnshaw  <rearnsha@arm.com>

	* arm.c (arm_reload_in_hi): Ensure that the scratch register does
	not overlap the final result register.


Index: arm.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.c,v
retrieving revision 1.259
retrieving revision 1.260
diff -p -p -r1.259 -r1.260
*** arm.c	10 Feb 2003 16:33:08 -0000	1.259
--- arm.c	16 Feb 2003 19:40:11 -0000	1.260
*************** arm_reload_in_hi (operands)
*** 5845,5851 ****
  	}
      }
  
!   scratch = gen_rtx_REG (SImode, REGNO (operands[2]));
    emit_insn (gen_zero_extendqisi2 (scratch,
  				   gen_rtx_MEM (QImode,
  						plus_constant (base,
--- 5845,5858 ----
  	}
      }
  
!   /* Operands[2] may overlap operands[0] (though it won't overlap
!      operands[1]), that's why we asked for a DImode reg -- so we can
!      use the bit that does not overlap.  */
!   if (REGNO (operands[2]) == REGNO (operands[0]))
!     scratch = gen_rtx_REG (SImode, REGNO (operands[2]) + 1);
!   else
!     scratch = gen_rtx_REG (SImode, REGNO (operands[2]));
! 
    emit_insn (gen_zero_extendqisi2 (scratch,
  				   gen_rtx_MEM (QImode,
  						plus_constant (base,