This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Patch applied to merged arm/thumb branch
- To: gcc-patches at gcc dot gnu dot org
- Subject: Patch applied to merged arm/thumb branch
- From: Bernd Schmidt <bernds at balti dot cygnus dot co dot uk>
- Date: Wed, 1 Mar 2000 16:50:06 +0000 (GMT)
I've committed the following patch ; approved by Nick Clifton.
This is a tiny optimization for avoiding memory loads when loading
e.g. floating point zero into a register.
Bernd
Index: ChangeLog
===================================================================
RCS file: /cvs/gcc/egcs/gcc/ChangeLog,v
retrieving revision 1.4780.2.39
diff -c -p -r1.4780.2.39 ChangeLog
*** ChangeLog 2000/02/29 18:02:24 1.4780.2.39
--- ChangeLog 2000/03/01 16:46:44
***************
*** 1,3 ****
--- 1,7 ----
+ 2000-03-01 Bernd Schmidt <bernds@cygnus.co.uk>
+
+ * config/arm/arm.md: Add splitter to turn SF moves into SI moves.
+
2000-02-29 Philip Blundell <pb@futuretv.com>
* config/arm/conix-elf.h: New file.
Index: config/arm/arm.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/arm/arm.md,v
retrieving revision 1.34.2.13
diff -c -p -r1.34.2.13 arm.md
*** arm.md 2000/02/29 01:41:19 1.34.2.13
--- arm.md 2000/03/01 16:46:49
***************
*** 4650,4655 ****
--- 4650,4670 ----
"
)
+ (define_split
+ [(set (match_operand:SF 0 "nonimmediate_operand" "")
+ (match_operand:SF 1 "immediate_operand" ""))]
+ "TARGET_ARM
+ && ! TARGET_HARD_FLOAT
+ && reload_completed
+ && GET_CODE (operands[1]) == CONST_DOUBLE"
+ [(set (match_dup 2) (match_dup 3))]
+ "
+ operands[2] = gen_lowpart (SImode, operands[0]);
+ operands[3] = gen_lowpart (SImode, operands[1]);
+ if (operands[2] == 0 || operands[3] == 0)
+ FAIL;
+ ")
+
(define_insn "*arm_movsf_hard_insn"
[(set (match_operand:SF 0 "nonimmediate_operand" "=f,f,f,m,f,r,r,r,m")
(match_operand:SF 1 "general_operand" "fG,H,mE,f,r,f,r,mE,r"))]